ALOXTM Substrate,
Technical Specification
|
Parameter |
Units |
Value |
Comment / Advantage |
|
|
Geometrical & Finish
Parameters |
||||
|
Total Thickness |
mm |
75 - 300 |
Typical 100-200. Very low
profile! Less than 50% of convention profile! |
|
|
Internal aluminum layer
Line/space |
mm |
100/100 |
Used for ground and power
layers. Very fine resolution for the
application! |
|
|
Internal aluminum layer
Thickness |
mm |
30-140 |
Option for very heavy ground
and power layers. |
|
|
Top & Bottom layers
line/space Top Copper layer thickness |
mm mm |
25/25 |
Current Minimum value, Cutting
edge resolution! Typical values. Heavier
copper traces can be fabricated |
|
|
Via width/Pitch (min) |
mm |
140/250 |
For substrate thick of 125mm. Current cutting edge resolution for Core applications |
|
|
Via Pad (= Land size) (min)
(For Substrate. Thickness of 125mm.) |
mm |
40 |
Land size equal to pad is
impossible to achieve in conventional technology. Typically for conventional
boards land size is three times the pad size. Dramatic advantage for ALOX
in terms of routing density! |
|
|
Finish Parameters (Typical) |
Nickel/Gold 5/0.2 mm &
Solder mask
|
Typical |
||
|
Mechanical and Thermal
Parameters |
||||
|
Young Modulus (E) |
Mpa |
130 |
Very high and clear advantage
over plastics |
|
|
Poison Ratio (n) |
-- |
0.29 |
|
|
|
Thermal Coefficient of
Expansion (TCE) |
ppm/deg |
7.8 |
This value is adjustable.
Value is ranging from 8-12. Great advantage over plastics in matching
properties to the silicon die. |
|
|
Flexural Strength |
MPa |
60,000 |
||
|
Thermal Conductivity of the
Dielectric |
Watt/mxdeg |
12-20 |
Property of the Dielectric.
Significant advantage. Integral Heat Sink option ! |
|
|
Integral Thermal via option! |
||||
|
Operating temperatures |
Deg. |
<300oC |
Extendable to <350 oC;
|
|
|
Reliability |
||||
|
1000 thermal cycles test,
1000 vias chain, 0.5 mm pitch |
% chain resistance change |
< 3% Pass |
-550C to +1250C JESDC
22-A104-B / PASS! |
|
Electrical
Data
|
Parameter |
Conditions/std. |
Units |
Value |
Comments |
|
Dielectric Constant |
50 Mhz - 20 GHz |
|
6.6 |
Outsource
measure |
|
Dissipation Factor |
50 Mhz - 20 GHz |
|
<1.2% |
Outsource
measure |
|
Withstand Voltage |
@40 mm |
Volts |
>1000
(25Volts /mm) |
MCL measurement |
|
Via Series Resistance |
Via chain, |
|
< 10mW |
MCL measurement |
|
Via inductance |
Dtop=50 mm H=200 mm Dcenter =250mm |
pH |
8.4 ±10% |
Calculation |
|
Blind Via inductance |
|
pH |
4.2±10% |
Calculation |
|
Via Capacitance |
|
|
|
|
|
Resistivity
of Cu traces |
@ 20 mm and 10mm respectively |
W/square. |
0.0017-0.0025 |
MCL measurements |
|
Type of Impedance Line |
|
NA |
Microstrip
Strip lines, differncial, |
|
|
Options |
|
NA |
Split in
ground /voltage layer, large vias |
|
|
Characteristic impedance for
transmission line |
|
|
25-100 W |
Outsource measure + estimate |
|
Impedance line tolerance |
|
|
±10% |
Estimated |
|
Delay |
|
ps/inch |
160-180 |
Outsource
measure |
|
Optional –
Integral Coils |
|
|
Integral
Coils |
|
|
Leakage current (Rvia-g) |
@500Volts |
W |
10exp13 |
TV2 (Outsource) |
|
Leakage current (Rz) |
@150Volts |
W cm |
3*10exp12 |
TV2 (Outsource) |
|
Surface resistance (Rs) |
@150Volts |
W /sq |
3*10exp13 |
TV2 (Outsource) |